1. Field of the Invention
The present invention relates to a MOS transistor and particularly relates to a structure of a MOS transistor element in a MOS integrated circuit device.
2. Description of the Prior Art
FIG. 1 is a sectional view showing major steps for explaining a method of manufacturing a conventional MOS field-effect transistor (MOSFET) in a MOS integrated circuit device (MOSIC). First, as shown in FIG. 1A, after an element separating layer (not shown) is selectively formed on a surface of a silicon substrate 1 provided as a semiconductor substrate, a relatively thin gate oxide film 2 is formed as a gate insulating film by a thermal oxidation process or the like and an impurity doping layer 3 for control of threshold voltage of a MOSFET is formed by an ion implantation process or the like. A polycrystal silicon layer 4 as a gate electrode material is formed on the gate oxide film 2 and then is doped with impurity such as phosphorus as required so that resistance may be lowered. On this polycrystal silicon layer 4, a photoresist layer 5 is formed only in desired regions. Subsequently, as shown in FIG. 1B, using the photoresist layer 5 as a mask, the polycrystal silicon layer 4 is selectively etched and removed so as to form a polycrystal silicon gate electrode 4', and then, using this gate electrode 4' as a mask, the substrate 1 is doped with impurity by an ion implantation process, a thermal diffusion process or the like and annealing and driving are suitably applied, whereby a source layer 6 and a drain layer 7 are formed. Then, as shown in FIG. 1B also, for the purpose of protecting the polycrystal silicon gate electrode 4', an oxide film 8 is formed on the surface thereof. Subsequently, as shown in FIG. 1C, an oxide film 9 containing phosphorus and the like is formed for smoothness and insulation of the surface and, then, contact holes 10 and 11 are formed in desired portions by photolithography and etching processes. After that, as shown in FIG. 1D, aluminum wirings 12 and 13 are formed to be in contact with necessary regions (the gate electrode 4' and the drain layer 7 in this example) through the contact holes 10 and 11, respectively. Then, a passivation film 14 is formed over the whole surface and thus, manufacturing of a MOSFET is completed.
The operation of such a MOSFET is well known and the description thereof will not be needed.
The above described conventional MOSFET has advantages that resistance can be made lower according to increase of the amount of diffused impurity at the time of forming the source layer 6 and the drain layer 7 and that, according to increase of the heat treatment temperature and the heat treatment time after ion implantation, impurity introduced in the substrate becomes more activated and the impurity concentration gradient of the source layer 6 and the drain layer 7 in the vicinity of the pn junctions between the source and drain layers 6 and 7 and the substrate 1 becomes smaller, which makes it possible to improve the dielectric strength between the source and drain layers 6 and 7 and the substrate 1.
However, on the other hand, the above described conventional MOSFET has disadvantages that due to the large amount of impurity, the high temperature of heat treatment and the long period of heat treatment, a depth x.sub.j from the surface of the substrate 1 to the source layer 6 and to the drain layer 7 is increased and in particular in case where the channel length is short, the dielectric strength between the source and drain regions is lowered. In addition, the above described conventional MOSFET has disadvantages that since the gate electrode 4' is formed on the substrate 1, the upper surface of the substrate becomes uneven and coating on the portions having level differences such as the aluminum wirings 12 and 13 formed on the upper surface is deteriorated, resulting in possible breakup of the wirings.
It was described that a capacitor is formed into Si substrate, in IEDM 1982, TECHNICAL DIGEST, p. 806, "A CORRUGATED CAPACITOR CELL (ccc) FOR MEGABIT DYNAMIC MOS MEMORIES" by H. Sunami et. al.